In mobile communication systems such as cellular mobile communication systems, communication between a mobile terminal and a wireless base station (hereinafter, referred to simply as a base station) is performed via a wireless transmission channel. As a multiple access system for a base station to communicate with a plurality of mobile, terminals simultaneously, frequency division multiple access (FDMA), time division multiple access (TDMA) and code division multiple access (CDMA) and the like have become into practical use.
In such mobile communication systems, when a frequency error such as a fixed radio frequency discrepancy between a base station and a mobile terminal is present, an operation for correcting the frequency error is generally conducted by the use of automatic frequency control (AFC) in the base station and the mobile terminal. The operation of frequency error correction by AFC is performed by estimating a frequency error of a received signal with the methods such as to control the frequency of a local oscillator and to control a frequency offset which is added to the received signal. The loop control is mainly employed in these methods.
On the other hand, a different method has been proposed with regard to the communication methods such as a burst communication in which the operation of frequency error correction by AFC utilizing the loop control is difficult. In the method, the demodulation is conducted after giving a plurality of fixed frequency offsets, which are prepared in advance, to received signals, and an optimum signal is selected from among the demodulated signals (refer to patent document 1).
FIG. 6 is a functional block diagram showing an example of a frequency correction circuit indicated in the patent document 2 as a related technology. In FIG. 6, a receiver antenna unit 101 receives radio signals from wireless communication equipment of the opposite side, and supplies them to a radio receiver unit 102. This radio receiver unit 102 conducts amplification, frequency conversion from a radio band to a baseband, orthogonal detection and analog to digital (A/D) conversion of the inputted signal, and outputs the signal processed by these kinds of processing to frequency offset giving units 103-1 to 103-N (N is an integer equal to or larger than 1).
Taking the signal outputted from the radio receiver unit 102 and a signal outputted from a frequency offset setting unit 106 as its inputs, each of the frequency offset giving units 103-1 to 103-N gives a frequency offset to the signal from the radio receiver unit 102 and outputs the signal to respective demodulation units 104-1 to 104-N. Specifically, each of the frequency offset giving units conducts a process of phase rotation in accordance with a frequency offset on each symbol of a baseband digital signal, which is outputted from the radio receiver unit 102.
The signals from the frequency offset giving units 103-1 to 103-N are inputted to the demodulation units 104-1 to 104-N. The demodulation unit processes separation of a desired user signal component from a plurality of user signals which are multiplexed, detection and selection of a timing (path delay) of a multi-path component of the desired user signal component, and channel estimation, and then calculates a demodulated signal. These demodulated signals are outputted to a demodulated signal selecting unit 105. The demodulated signal selecting unit 105 selects an optimum demodulated signal from among these demodulated signals.
A frequency offset setting unit 106 determines fixed frequency offsets corresponding to a plurality of frequency errors wholly covering the band in which the frequency errors are assumed to be occurring, and provides them to the frequency offset giving units 103-1 to 103-N
As the frequency errors in received signals are corrected by the use of the above-described configuration, it is possible to prevent degradation of the demodulated signals. However, in order to correct a frequency error with high accuracy, it is required to finely cover the band in which the frequency errors is assumed to be occurring, and hence to set a large value for N, which results in an increase in the circuit scale and the cost of equipment.
Accordingly, another frequency correction circuit, which is an improvement over the circuit shown in FIG. 6, is proposed in the patent document 2. FIG. 7 is a functional block diagram showing an example of this improved frequency correction circuit, where the parts equivalents to that in FIG. 6 are indicated with the identical numbers.
In FIG. 7, demodulated signal combining units 109-1 to 109-N−1 are added to the configuration in FIG. 6. Each of the demodulated signal combining units 109-1 to 109-N−1 calculates a combined demodulated signal, by taking the demodulated signals outputted from a plurality of demodulation units among the demodulation units 104-1 to 104-N as its inputs and combining these demodulated signals. The combined demodulated signals thereby calculated are supplied to the demodulated signal selecting unit 105.
The remaining configurations are identical with that in FIG. 6, and their description is omitted here. Further, the example in FIG. 7 presents the ease where each of the demodulated signals combining unit 109-1 to 109-N−1 combines two demodulated signals, but there is no limit on the number of demodulated signals combined together. As a method to calculate a combined demodulated signal in the demodulated signal combining units 109-1 to 109-N−1, there is a method, for example, to combine a plurality of demodulated signals whose frequency offsets are adjacent to each other, employing a maximum ratio combining method in accordance with their signal to interference power ratio (SIR) values.
The demodulated signal selecting unit 105 is configured to select an optimum signal from among a group consisting of the demodulated signals outputted from the demodulation units 104-1 to 104-N and the combined demodulated signals outputted from the demodulated signal combining units 109-1 to 109-N−1.
With this configuration, the circuit becomes equivalent to the one in which the number of the fixed frequency offsets corresponding to the frequency errors is effectively twice that of the frequency offset giving units 103-1 to 103-N and of the demodulation units 104-1 to 104-N. Therefore, it becomes possible to configure a frequency correction circuit without making the number N larger.
The patent document 3 can be mentioned as another document describing a related technology, for example.
Patent document 1: Japanese Patent Application Laid-Open No. 1995-176994
Patent document 2: Japanese Patent Application Laid-Open No. 2008-263426
Patent document 3: Japanese Patent Application Laid-Open No. 2001-016135